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PostPosted: 13 Mar 2018 01:04 
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Joined: 28 Oct 2007 03:16
Posts: 116
Location: West Australia
I am trying to set up a new project with:

1. PIC32MX795F512L using the compiler 4.0.0 with 'built in TFT'
2. The MikroEletronika TFT Proto 7 inch display with SSD1963 screen controller and STMPE811 I2C touch controller

The 'EDIT PROJECT' with 'TFT PROTO 7' selected will not accept the STMPE811 touch setting

Any advice please?

Regards Bill Legge
In Australia


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PostPosted: 15 Mar 2018 04:44 
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Joined: 28 Oct 2007 03:16
Posts: 116
Location: West Australia
Some progress:
1. Screen is illuminated
2. Text and graphics working
3. But only about half of the screen is displayed

Despite setting the display size to 800 X 480.
Any advice please.
Code used follows:
////////////////////////////////////////////////////////////////////////////////
// Project:         DB_Template                                               //
// File:            DB_Template_Main.c                                        //
// Function:        Drive TFT Proto 7 inch in 16 bit mode                     //
// MCU:             32MX795F512L                                              //
// Board:           WVL_Dev_Board                                             //
// Power:           3.3V for MCU and TFT                                      //
// Xtal:            Running at 80MHz                                          //
// Compiler:        mikroC PRO for PIC32 version 4.0.0                        //
// Author:          WVL                                                       //
// Date:            March 2018                                                //
////////////////////////////////////////////////////////////////////////////////

////////////////////////////////////////////////////////////////////////////////
// TFT module connections                                                     //
char TFT_DataPort       at LATE;                                              //
char TFT_DataPort_Direction at TRISE;   // TRISE is lower PMD0 to PMD7        //
sbit TFT_RST            at LATA0_bit;                                         //
sbit TFT_CS             at LATA1_bit;                                         //
sbit TFT_RS             at LATA2_bit;                                         //
sbit TFT_RD             at LATD5_bit;   // PMRD                               //
sbit TFT_WR             at LATD4_bit;   // PMWR                               //
sbit TFT_RST_Direction  at TRISA0_bit;                                        //
sbit TFT_CS_Direction   at TRISA1_bit;                                        //
sbit TFT_RS_Direction   at TRISA2_bit;                                        //
sbit TFT_RD_Direction   at TRISD5_bit;  // PMRD                               //
sbit TFT_WR_Direction   at TRISD4_bit;  // PMWR                               //
////////////////////////////////////////////////////////////////////////////////

void PMPWaitBusy() {
  while(PMMODEbits.BUSY);
}
void Set_Index(unsigned short index) {
  TFT_RS = 0;
  PMDIN = index;
  PMPWaitBusy();
}
void Write_Command( unsigned short cmd ) {
  TFT_RS = 1;
  PMDIN = cmd;
  PMPWaitBusy();
}
void Write_Data(unsigned int _data) {
  TFT_RS = 1;
  PMDIN = _data;
  PMPWaitBusy();
}

void main() {
    AD1PCFG = 0xFFFF;           // configure AN pins as digital I/O
    JTAGEN_bit = 0;             // disable JTAG
    // Init ports and pins
    TRISA = 0;                  // RST/RA0, CS/RA1, RS/RA2
    TRISB = 0;
    TRISC = 0;
    TRISD = 0;
    TRISE = 0;
    TRISF = 0;
    TRISG = 0;
    // Init PMP for 16 bit copied from Mikro site
    PMMODE = 0;
    PMAEN  = 0;
    PMCON  = 0;
    PMMODEbits.MODE = 2;        // Master 2
    PMMODEbits.WAITB = 0;       // data setup - default
    PMMODEbits.WAITM = 1;       // data read -
    PMMODEbits.WAITE = 0;       // data hold after strobe - default
    PMMODEbits.MODE16 = 1;      // 16 bit mode
    PMCONbits.CSF = 0;          // chip select function bits
    PMCONbits.PTRDEN = 1;       // read strobe port enabled
    PMCONbits.PTWREN = 1;       // write strobe port enabled
    PMCONbits.PMPEN = 1;        // enable
    // Init TFT
    TFT_Set_Active(Set_Index,Write_Command,Write_Data);
    TFT_Init_SSD1963(800,480);  // for 16 bit mode
    TFT_Set_MM_Plus();          // necessary for correct colours
    TFT_Set_DBC_SSD1963(255);   // dynamic backlight

    // Set font and screen colour
    TFT_Fill_Screen(CL_YELLOW);
    // Identify
    TFT_Write_Text("L1",0,0);
    TFT_Write_Text("L2",0,100);
    TFT_Rectangle(20, 20, 219, 107);

     while(1){
            LATE3_bit = ~LATE3_bit;
            delay_ms(100);
     }
}


Regards Bill Legge in Australia


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PostPosted: 15 Mar 2018 07:30 
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Joined: 28 Oct 2007 03:16
Posts: 116
Location: West Australia
Photograph of partially filled screen is attached.
The text is just visible on the left of screen.


Attachments:
IMG_2585.JPG
IMG_2585.JPG [ 44.76 KiB | Viewed 748 times ]
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PostPosted: 15 Mar 2018 17:45 
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Joined: 05 Mar 2018 09:44
Posts: 542
Location: Belgrade
Hi,

I`m working on your problem.
In the meantime if anything comes up, do inform me.

Regards,
Petar


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PostPosted: 15 Mar 2018 20:21 
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Joined: 05 Mar 2018 09:44
Posts: 542
Location: Belgrade
Hi,

Can you post the pinout of the connection between board and TFT?
What development board is that?

I successfully connected PIC32 with Proto TFT on EasyPIC Fusion v7 using this examples.
so you can check it out :

https://www.youtube.com/watch?v=VZ9jTYRINtc
and
https://www.youtube.com/watch?v=SgtP4MZ9Hys

Regards,
Petar


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PostPosted: 16 Mar 2018 00:48 
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Joined: 28 Oct 2007 03:16
Posts: 116
Location: West Australia
Thanks for looking into this difficulty.

Wiring diagram is attached:
1. The data pins are connected to the Parallel Master Data (PMD) pins of the PIC32.
2. Read is connected to PMRD - RD5
3. Write is connected to PMWR - RD4
4. The others (SRT,RS,CS,) are connected to RA0,RA1,RA2.
I have double checked and can not find an error.
Any advice would be welcome

Regards Bill Legge in Australia

Attachment:
WVL PIC32MX TFT to MCU Connections Small Format.jpg
WVL PIC32MX TFT to MCU Connections Small Format.jpg [ 182.48 KiB | Viewed 731 times ]


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PostPosted: 16 Mar 2018 07:36 
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Joined: 28 Oct 2007 03:16
Posts: 116
Location: West Australia
Thanks for the link to U Tube. I have seen the videos.
Just to check that there was nothing odd about using PORTA for RST,CS and RS, I swapped to RB9,RB10 and RB11 - but the problem persists?
Looking into the file _Lib_TFT_Defs.c there is a function FTF_Reset_SSD1963() that contains these lines:

  TFT_Write_Command_Ptr(0x01);      //SET horizontal size=480-1 HightByte
  TFT_Write_Command_Ptr(0xdf);      //SET horizontal size=480-1 LowByte
  TFT_Write_Command_Ptr(0x01);      //SET vertical size=272-1 HightByte
  TFT_Write_Command_Ptr(0x0f);      //SET vertical size=272-1 LowByte
  TFT_Write_Command_Ptr(0x00);      //SET even/odd line RGB seq.=RGB

I tried changing this to the display size 800X480:
  TFT_Write_Command_Ptr(0x03);      //SET horizontal size=800 HightByte
  TFT_Write_Command_Ptr(0x20);      //SET horizontal size=800 LowByte
  TFT_Write_Command_Ptr(0x01);      //SET vertical size=480 HightByte
  TFT_Write_Command_Ptr(0xE0);      //SET vertical size=480 LowByte
  TFT_Write_Command_Ptr(0x00);      //SET even/odd line RGB seq.=RGB

And as the U tube video said 'add 1' to the width and height, to 801X481:
  TFT_Write_Command_Ptr(0x03);      //SET horizontal size=800+1 HightByte
  TFT_Write_Command_Ptr(0x21);      //SET horizontal size=800+1 LowByte
  TFT_Write_Command_Ptr(0x01);      //SET vertical size=480+1 HightByte
  TFT_Write_Command_Ptr(0xE1);      //SET vertical size=480+1 LowByte
  TFT_Write_Command_Ptr(0x00);      //SET even/odd line RGB seq.=RGB

Display filled up - but the vertical sync was off and the image jumping around?
I think something is wrong in this file for the 800X480 display?
Has anyone used is successfully with a PIC32?

Regards Bill Legge in Australia


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PostPosted: 20 Mar 2018 23:48 
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Joined: 28 Oct 2007 03:16
Posts: 116
Location: West Australia
Petar,

Any progress yet on your tests?
Other things I have tried with no luck:
1. +1, -1 and = in the file _Lib_TFT_Defs.c that sets the vertical and horizontal size 800X480.
2. Copied all the settings for the SSD1963 from the MikroC Pro for ARM file in the demo software.
3. Played about with the sync and timing variables as described in the video on U Tube.

All with no luck.
It is nearly working. Depending on the settings described above:
1. Only about half of the display is working or
2. The vertical and horizontal sync is not correct and the screen image is fyling around.

Anyone got any software in C32 for this 7 inch display?


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PostPosted: 08 Nov 2018 19:22 
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Joined: 16 Aug 2010 15:07
Posts: 15
Hey Bill, not sure if you're still messing around with this or not, but I created a new pattern in VTFT here (the one integrated into PIC32 v4.0.0) for the Proto7, and set it all up for the SSD1963 and for the life of the freaking compiler it would not set up to 800 x 480 and always defaulted back to 640 x 480. So I just finished setting everything up, then went into the \Mikroelektronika\mikroC PRO for PIC32\Board Defs folder and found the .XML for the pattern I just made, edited it to 800 in there, went back into VTFT and reloaded the pattern and the 800 x 480 stuck that time and it has been fine since.

I had issues years back with the Proto7 when I first tried it out, having just all kinds of garbage on the screen as well like the timing was messed up, and that ended up with me finding an issue in the \Mikroelektronika\mikroC PRO for PIC32\Uses _Lib_TFT_Defs.c file where it was setting up the Proto7 too quickly, so some settings were just not getting done correctly, and per the DS for the SSD1963 I slowed that down until the PLL on it was up to speed, then set it back and it worked fine. I haven't seen that issue on this version of the compiler so far though, as the last update or two have wiped that file out, but I still have the changes saved if you think that might make any difference there.

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PostPosted: 12 Nov 2018 22:42 
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Joined: 16 Aug 2010 15:07
Posts: 15
I dug all this back out, and yeah, the 'stock' __Lib_TFT_Defs.c file for initializing the Proto7 board (SSD1963) is just wrong. It either doesn't work or you get a screen of garbage where it looks like the sync is all out of wack The issue is with the __Lib_TFT_Defs.c file and how it resets the Proto7 board.

You'll need to edit that thing, specifically the static void TFT_Reset_SSD1963() section. Then delete the __Lib_TFT_Defs.asm file and __Lib_TFT_Defs.emcl file BEFORE compiling again with the edited __Lib_TFT_Defs.c file, or else it may just use them again and the changes will not take effect. After compiling it will create new ones.

As always, make a backup of your original files before making any changes, as YMMV, but this worked for me here.

You may still need to go in and edit the .XML file for the pattern you are using if you still can't get the full 800 x 480, as previously mentioned.

These are the changes I made to my __Lib_TFT_Defs.c file..

#define TFT_Write_Strobe_Slow()  TFT_WR = 0; delay_us(1); TFT_WR = 1;   // add up top with rest of #defines


void TFT_Set_Index_Slow(unsigned short index) {  // add up top right after #defines
  TFT_RS = 0;
  TFT_DataPort = index;
  TFT_Write_Strobe_Slow();
}


void TFT_Write_Command_Slow(unsigned short cmd) {  // add up top under the above TFT_Set_Index_Slow
  TFT_RS = 1;
  TFT_DataPort = cmd;
  TFT_Write_Strobe_Slow();
}


static void TFT_Reset_SSD1963(){  // Replace existing static void TFT_Reset_SSD1963() section with this one

  TFT_RST = 0;                               // Hold in reset
  TFT_RST_Direction = 0;                     // Set reset pin as output
  TFT_RS = 1;                                // Enable data access
  TFT_RS_Direction = 0;                      // Set RS pin as output
  TFT_CS = 1;                                // Disable LCD
  TFT_CS_Direction = 0;                      // Set LCD CS pin as output
  TFT_RD_Direction = 0;
  TFT_WR_Direction = 0;
  TFT_RD = 1;
  TFT_WR = 1;
  Delay_100ms();
  TFT_RST = 1;
  Delay_100ms();
  Delay_100ms();

  TFT_CS = 0;                                // Use Slow Index and Command as the TFT CLK is 10MHz until PLL is locked
  TFT_Set_Index_Slow(0x01);                  // Software Reset
  Delay_10ms();

  TFT_Set_Index_Slow(0x13);                  // Enter Normal Mode
  TFT_Set_Index_Slow(0x34);                  // Set Tear Off, TE signal not sent

  TFT_Set_Index_Slow(0xE2);                  // Set PLL MN
  TFT_Write_Command_Slow(0x29);              // PLLclk = REFclk * 29 (330MHz) ???    //
  TFT_Write_Command_Slow(0x03);              // SYSclk = PLLclk / 3  (120MHz) ???
  TFT_Write_Command_Slow(0x54);              // validate M and N

  // SSD1963, This is needed to switch to PLL output as system clock after PLL is locked. The following is the program sequence.
  // WRITE COMMAND “0xE0”
  // WRITE DATA “0x01”
  TFT_Set_Index_Slow(0xE0);
  TFT_Write_Command_Slow(0x01);              // START PLL

  Delay_50us(); Delay_50us();                // Wait 100us to let the PLL stabilize

  TFT_Set_Index_Slow(0xE0);                  // WRITE DATA “0x03”
  TFT_Write_Command_Slow(0x03);              // LOCK PLL
  TFT_Set_Index_Slow(0x01);                  // TFT CLK is over 100MHz here and Index/Command can be sent fast now
 /*
  TFT_Set_Index_Ptr(0xB0);                   // SET LCD MODE  SET TFT 18Bits MODE
  if (Is_TFT_MM_Plus() == 0)
    {
    TFT_Write_Command_Ptr(0x08);             // SET TFT MODE & hsync+Vsync+DEN MODE
    TFT_Write_Command_Ptr(0x80);             // SET TFT MODE & hsync+Vsync+DEN MODE
    }
  else
    {
    TFT_Write_Command_Ptr(0x28);             // SET TFT MODE & hsync+Vsync+DEN MODE
    TFT_Write_Command_Ptr(0x20);             // SET TFT MODE & hsync+Vsync+DEN MODE
    }
  TFT_Write_Command_Ptr(0x01);               // SET horizontal size=480-1 HightByte
  TFT_Write_Command_Ptr(0xDF);               // SET horizontal size=480-1 LowByte
  TFT_Write_Command_Ptr(0x01);               // SET vertical size=272-1 HightByte
  TFT_Write_Command_Ptr(0x0F);               // SET vertical size=272-1 LowByte
  TFT_Write_Command_Ptr(0x00);               // SET even/odd line RGB seq.=RGB
 */
  TFT_Set_Index_Ptr(0xB0);                   // SET LCD MODE  SET TFT 18Bits MODE
  TFT_Write_Command_Ptr(0x20);               // SET TFT MODE & hsync+Vsync+DEN MODE
  TFT_Write_Command_Ptr(0x20);               // SET TFT MODE & hsync+Vsync+DEN MODE
  TFT_Write_Command_Ptr(0x03);               // HORIZONTAL panel size - 1 _hi
  TFT_Write_Command_Ptr(0x1F);               //                          _lo
  TFT_Write_Command_Ptr(0x01);               // VERTICAL panel size - 1 _hi
  TFT_Write_Command_Ptr(0xDF);               //                        _lo
  TFT_Write_Command_Ptr(0x00);               // SET even/odd line RGB seq.=RGB

  TFT_Set_Index_Ptr(0xF0);
  TFT_Write_Command_Ptr(0x03);               // 3 -16bit,0 -8bit        //SET pixel data I/F format

 // TFT_Set_Index_Ptr(0x3A);                 // Seems to have been removed on some SSD1963 ??
 // TFT_Write_Command_Ptr(0x07);             // SET R G B format = 5 6 5

  // Set LSHIFT freq (DCLK from PLL)
  //  Typical DCLK for TM070RBH10 is 29.23MHz
  //  29.23 = 120 * (LCDC_FPR + 1) / 2^20
  //  LCD_FPR = 255415 (0x3E5B7)

  TFT_Set_Index_Ptr(0xE6);                   // SET PCLK freq=10MHz  ; pixel clock frequency, NOT SET CORRECTLY BUT WORKS
  TFT_Write_Command_Ptr(0x04);               // 01
  TFT_Write_Command_Ptr(0x45);               // 45
  TFT_Write_Command_Ptr(0x47);               // 47

  TFT_Set_Index_Ptr(0xB4);                   // SET HBP,
  TFT_Write_Command_Ptr(0x03);               // SET HSYNC total 525            // 02
  TFT_Write_Command_Ptr(0x52);               // 0d
  TFT_Write_Command_Ptr(0x00);               // SET HBP 43                     // 00
  TFT_Write_Command_Ptr(0x31);               // 2B
  TFT_Write_Command_Ptr(0x2E);               // SET VBP 41=40+1                // 28
  TFT_Write_Command_Ptr(0x00);               // SET Hsync pulse start position               // rest 00
  TFT_Write_Command_Ptr(0x03);
  TFT_Write_Command_Ptr(0x00);               // SET Hsync pulse subpixel start position

  TFT_Set_Index_Ptr(0xB6);                   // SET VBP,
  TFT_Write_Command_Ptr(0x02);               // SET Vsync total 286=285+1        // 01
  TFT_Write_Command_Ptr(0x12);               // 1d
  TFT_Write_Command_Ptr(0x00);               // SET VBP=12                       // 00
  TFT_Write_Command_Ptr(0x33);               // 0c
  TFT_Write_Command_Ptr(0x03);               // SET Vsync pulse 10=9+1           // 09
  TFT_Write_Command_Ptr(0x00);               // SET Vsync pulse start position       // rest 00
  TFT_Write_Command_Ptr(0x1C);

  TFT_Set_Index_Ptr(0x36);                   // memory access control

  if (TFT_Disp_Rotation == 90)
    if (Is_TFT_Rotated_180())
      TFT_Write_Command_Ptr(0x60);
    else
      TFT_Write_Command_Ptr(0xA0);
  else
    if (Is_TFT_Rotated_180())
      TFT_Write_Command_Ptr(0xC0);
    else
      TFT_Write_Command_Ptr(0x00);

  TFT_Set_Index_Ptr(0x29);                   // SET display on
  TFT_CS = 1;

  TFT_Set_DBC_SSD1963(255);                  // TURN BACKLIGHT ON
}

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PostPosted: 14 Nov 2018 04:44 
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Posts: 15
OK, just realized this was done with the PMP in your code, and that didn't fly here either. So, last poke at this dead horse for anyone that may run across this thread with the same issue.

The issue is still in the __Lib_TFT_Defs.c file, the static void TFT_Reset_SSD1963() section.

static void TFT_Reset_SSD1963(){

  TFT_RST = 0;   // Hold in reset
  TFT_RST_Direction = 0;  // Set reset pin as output
  TFT_RS = 1;  // Enable data access
  TFT_RS_Direction = 0;  // Set RS pin as output
  TFT_CS = 1;   // Disable LCD
  TFT_CS_Direction = 0;  // Set LCD CS pin as output
  TFT_RD_Direction = 0;
  TFT_WR_Direction = 0;
  TFT_RD = 1;
  TFT_WR = 1;

  Delay_100ms();
  TFT_RST = 1;
  Delay_100ms();
  Delay_100ms();

  TFT_CS = 0;                                     // TFT CLK is 10MHz until PLL is locked
 
  TFT_Set_Index_ptr(0x01);                       // Software Reset
  Delay_10ms();
 
  TFT_Set_Index_ptr(0x13);                              // Enter Normal Mode
  TFT_Set_Index_ptr(0x34);                              // Set Tear Off, TE signal not sent

  TFT_Set_Index_ptr(0xE2);                                  // Set PLL MN       
  TFT_Write_Command_ptr(0x29);                     // PLLclk = REFclk * 29 (330MHz) ???    //
  TFT_Write_Command_ptr(0x03);                      // SYSclk = PLLclk / 3  (120MHz) ???
  TFT_Write_Command_ptr(0x54);                     // validate M and N

  // SSD1963, This is needed to switch to PLL output as system clock after PLL is locked. The following is the program sequence.
  // WRITE COMMAND “0xE0”
  // WRITE DATA “0x01”
  TFT_Set_Index_ptr(0xE0);
  TFT_Write_Command_ptr(0x01);                   // Soft Reset
 
  Delay_50us(); Delay_50us();             // Wait 100us to let the PLL stabilize
  // WRITE DATA “0x03”
  TFT_Set_Index_ptr(0xE0);
  TFT_Write_Command_ptr(0x03);                   // LOCK PLL
  TFT_Set_Index_ptr(0x01);                       // Soft Reset
 
 /*
  TFT_Set_Index_Ptr(0xB0);                            // SET LCD MODE  SET TFT 18Bits MODE
  if (Is_TFT_MM_Plus() == 0)
    {
    TFT_Write_Command_Ptr(0x08);                        // SET TFT MODE & hsync+Vsync+DEN MODE
    TFT_Write_Command_Ptr(0x80);                        // SET TFT MODE & hsync+Vsync+DEN MODE
    }
  else
    {
    TFT_Write_Command_Ptr(0x28);                        // SET TFT MODE & hsync+Vsync+DEN MODE
    TFT_Write_Command_Ptr(0x20);                        // SET TFT MODE & hsync+Vsync+DEN MODE
    }
  TFT_Write_Command_Ptr(0x01);                        // SET horizontal size=480-1 HightByte
  TFT_Write_Command_Ptr(0xdf);                        // SET horizontal size=480-1 LowByte
  TFT_Write_Command_Ptr(0x01);                        // SET vertical size=272-1 HightByte
  TFT_Write_Command_Ptr(0x0f);                         // SET vertical size=272-1 LowByte
  TFT_Write_Command_Ptr(0x00);                        // SET even/odd line RGB seq.=RGB
 */ 
 
  TFT_Set_Index_Ptr(0xB0);                            // SET LCD MODE  SET TFT 18Bits MODE
  TFT_Write_Command_Ptr(0x20);                    // SET TFT MODE & hsync+Vsync+DEN MODE
  TFT_Write_Command_Ptr(0x20);                    // SET TFT MODE & hsync+Vsync+DEN MODE
  TFT_Write_Command_Ptr(0x03);                        // HORIZONTAL panel size - 1 _hi
  TFT_Write_Command_Ptr(0x1F);                    //                          _lo
  TFT_Write_Command_Ptr(0x01);                    // VERTICAL panel size - 1 _hi
  TFT_Write_Command_Ptr(0xDF);                    //                        _lo
  TFT_Write_Command_Ptr(0x00);                    // SET even/odd line RGB seq.=RGB

  TFT_Set_Index_Ptr(0xf0);
  TFT_Write_Command_Ptr(0x03);                        // 3 -16bit,0 -8bit        //SET pixel data I/F format
 
 // TFT_Set_Index_Ptr(0x3A);                      // Seems to have been removed on some SSD1963 ??
 // TFT_Write_Command_Ptr(0x07);                  // SET R G B format = 5 6 5
 
  // Set LSHIFT freq (DCLK from PLL)
  //  Typical DCLK for TM070RBH10 is 29.23MHz
  //  29.23 = 120 * (LCDC_FPR + 1) / 2^20
  //  LCD_FPR = 255415 (0x3E5B7)
 
  TFT_Set_Index_Ptr(0xE6);                            // SET PCLK freq=10MHz  ; pixel clock frequency, NOT SET CORRECTLY BUT WORKS
  TFT_Write_Command_Ptr(0x04);                        // 01
  TFT_Write_Command_Ptr(0x45);                        // 45
  TFT_Write_Command_Ptr(0x47);                        // 47

  TFT_Set_Index_Ptr(0xb4);                            // SET HBP,
  TFT_Write_Command_Ptr(0x03);                        // SET HSYNC Tatol 525                           // 02
  TFT_Write_Command_Ptr(0x52);                                                                      // 0d
  TFT_Write_Command_Ptr(0x00);                        // SET HBP 43                                    // 00
  TFT_Write_Command_Ptr(0x31);                                                                      // 2B
  TFT_Write_Command_Ptr(0x2E);                        // SET VBP 41=40+1                               // 28
  TFT_Write_Command_Ptr(0x00);                        // SET Hsync pulse start position               // rest 00
  TFT_Write_Command_Ptr(0x03);
  TFT_Write_Command_Ptr(0x00);                        // SET Hsync pulse subpixel start position

  TFT_Set_Index_Ptr(0xb6);                            // SET VBP,
  TFT_Write_Command_Ptr(0x02);                        // SET Vsync total 286=285+1             // 01
  TFT_Write_Command_Ptr(0x12);                                                              // 1d
  TFT_Write_Command_Ptr(0x00);                        // SET VBP=12                            // 00
  TFT_Write_Command_Ptr(0x33);                                                              // 0c
  TFT_Write_Command_Ptr(0x03);                        // SET Vsync pulse 10=9+1                // 09
  TFT_Write_Command_Ptr(0x00);                        // SET Vsync pulse start position       // rest 00
  TFT_Write_Command_Ptr(0x1C);

  TFT_Set_Index_Ptr(0x36);                               // memory access control
 
  if (TFT_Disp_Rotation == 90)
    if (Is_TFT_Rotated_180())
      TFT_Write_Command_Ptr(0x60);
    else
      TFT_Write_Command_Ptr(0xA0);
  else
    if (Is_TFT_Rotated_180())
      TFT_Write_Command_Ptr(0xC0);
    else
      TFT_Write_Command_Ptr(0x00); 
 
  TFT_Set_Index_Ptr(0x29);                        // SET display on
  TFT_CS = 1;
 
  TFT_Set_DBC_SSD1963(255);                          // TURN BACKLIGHT ON
}


The only thing changed is above in that section, it's pretty much your exact hardware setup and code here, I only edited the L1 and L2 to L3 and L4 and I used RB0~RB2 instead of RA0~RA2, but those would make 0 difference. Every other bit of hardware and code should be what you're running there, so the issue should be all in the above section of code.

This code change works fine when using the PMP on the PIC, but it will still fail if using a full 16bit port like my previous post. I used PORTD there for the data to the Proto7, and in that case it still needs the Index and Commands sent Slow before the PLL locks.

NOTE: Using the PMP in this way, it is actually slower than using the full 16bit wide PORTD on that chip for the TFT data lines. I just did a 'test' using the code here, main screen with 2 buttons, press a button and it turns and LED on, then draws thru 5 screens changing colors, White, Red, Green, Blue, Black (start screen) a few times. With the code done this way here and using the PMP that 'test' took 6.267 seconds, measured with the Logic Analyzer on the LED pin, using PORTD instead of the PMP, it took 4.297 seconds. So unless you were to get in there and redo all of the TFT commands and such to be sent by the PMP and your own code to take advantage of that hardware, it would be faster to just use PORTD for the data lines on that 32MX795.

NOTE: To any Fusion v7 board users with the 32MX795 MCU card. It has that ETH chip on there, so you can't use all of PORTD as some of those are eaten up by the ETH chip. Then you will also lose some Fusion board options like the Buzzer, MicroSD card and Flash. You would need to modify the MCU card or just make a new one up and ditch the ETH chip to use that full PORTD.


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